Datasheet > 100331WFQMLV

100331WFQMLV

更新时间： 2024-11-21 07:23:55

品牌	Logo	应用领域
德州仪器 - TI		输出元件
页数	文件大小	规格书
9页	83K
描述
100K SERIES, TRIPLE POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CQFP24, CERQUAD-24

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100331WFQMLV 数据手册

MICROCIRCUIT DATA SHEET

Original Creation Date: 10/30/95

Last Update Date: 04/23/04

MN100331-X REV 1B0

Last Major Revision Date: 08/21/96

LOW POWER TRIPLE D FLIP-FLOP

General Description

The F100331 contains three D-type, edge-triggered master/slave flip-flops with true and

complement outputs, a common clock (CPc), and Master Set (MS) and Master Reset (MR)

inputs. Each flip-flop has individual clock (CPn), Direct Set (SDn) and Direct Clear

(CDn) Inputs. Data enters a master when both CPn and CPc are LOW and transfers to a slave

when CPn or CPc (or both) go HIGH. The Master Set, Master Reset and individual CDn and

SDn inputs override the Clock inputs. All inputs have 50k ohm pull-down resistors.

Industry Part Number

NS Part Numbers

100331

100331DMQB

100331FMQB

100331J-QMLV

100331W-QMLV

100331WFQMLV

Prime Die

F331

Controlling Document

SEE FEATURES SECTION

Processing

Subgrp Description

Temp (^oC)

MIL-STD-883, Method 5004

Static tests at

+25

Static tests at

+125

-55

Static tests at

Dynamic tests at

Functional tests at

Switching tests at

+25

Quality Conformance Inspection

+125

-55

MIL-STD-883, Method 5005

+25

+125

-55

+25

+125

-55

12 3 4 5 6 7...9

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